Floating point numbers comprise a mantissa part and an exponent part and are usually 32-bit (`single precision`) or 64-bit (`double precision`) in size. The formats of floating point numbers depend on the standard implemented. For example, the widely implemented IEEE standard has the format 1.fff X 2.sup.e where 1.fff is the normalised mantissa and e is the exponent.
A floating point addition operation (which may be a subtract operation depending on the sign of the floating point number(s)) for two floating point numbers typically comprises the following steps:
1). Calculate the difference between the two exponents. PA1 2). Shift the mantissa of the smaller number right by the absolute value of the exponent difference so as to align the smaller number to the greater number. PA1 3). Add the two mantissas. PA1 4). Normalise the addition result PA1 5). Subtract the binary value from the exponent value in order to update the result of the floating point addition operation. This result is the exponent result (EXP.sub.-- low). PA1 6). Round the result. After rounding, the final exponent result may be one of two possible values: exponent result, EXP.sub.-- low or rounded exponent result, EXP.sub.-- high, where EXP.sub.-- high=EXP.sub.-- low+1. PA1 7). Check that the final exponent result has a value within a predetermined range and generate overflow and underflow flags accordingly. PA1 8). Result is driven to an output of the floating point adder.
a) Find the leading `one` (`1`) bit of the mantissa's addition result (result of step 3). PA2 b) Shift the mantissa's addition result to the left to discard all the leading zeros until the leading `1` bit becomes the Most Significant Bit (MSB) of the result (in case of subtract operation). PA2 c) Encode the number of left shifts required to a binary value for updating the exponent result.
The final exponent result is the rounded exponent result (EXP.sub.-- high) only if the mantissa addition result comprises all `1`s such that on rounding, the mantissa overflows. Otherwise, the final exponent result is the exponent result (EXP.sub.-- low).
The detection of underflow and overflow of the final exponent result and generation of corresponding flags occurs in the critical path of the floating point adder. Typically, the detection and generation of underflow and overflow occur after the exponent result has been updated and rounded as necessary. The delay time required for such a step is in the critical path, and therefore limits the performance of the floating point adder. Another disadvantage with known floating point adders is that the logic required for underflow and overflow detection is complicated and requires significant area to implement.
There is therefore a need to provide an improved floating point adder system which performs faster detection of underflow and overflow of the exponent results.